Kurumi · · 5 min read OLIX Raises $312M for Photonic AI Inference Chips
UK startup OLIX raised $312M at a $3.3B valuation for its optical AI inference chips, backed by Arm and Reed Hastings. What the photonic bet means.
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18 posts tagged “Chips”.
Kurumi · · 5 min read UK startup OLIX raised $312M at a $3.3B valuation for its optical AI inference chips, backed by Arm and Reed Hastings. What the photonic bet means.
Chisato · · 5 min read The Trump administration is drafting an FCC ban on Chinese optical transceivers for US data centers. Who wins, who loses, and what it means for AI.
Kurumi · · 6 min read Tesla and SpaceX confirmed Terafab, a $16.8B first-phase chip fab in Grimes County, Texas, with plans to reach 1 terawatt of compute a year. The details.
Chisato · · 5 min read Cache coherence keeps each CPU core's private cache consistent with the others. The MESI protocol is the classic mechanism that makes it work.
Chisato · · 4 min read Branch prediction guesses which way an if-statement will go before the CPU knows, and out-of-order execution reorders instructions to keep pipelines full.
Chisato · · 4 min read An ASIC is a chip custom-built for one task, trading flexibility for speed and power efficiency. How ASICs differ from GPUs and FPGAs, and when to use one.
Kurumi · · 6 min read Samsung and SK Hynix signed roughly $950 billion in chip-supply deals with US tech giants including Nvidia at Korea's San Francisco AI summit. The breakdown.
Chisato · · 4 min read Nvidia and SK Group unveiled a $500B+ AI partnership locking in SK Hynix HBM4 supply and a 2GW AI factory in Korea. Here are the details and what to watch.
Chisato · · 4 min read CXL is an interconnect standard that lets CPUs, GPUs, and memory devices share coherent memory over PCIe, enabling memory pooling and expansion.
Chisato · · 7 min read Nvidia detailed its Vera CPU — 88 custom Olympus cores, 1.2 TB/s memory, and SPEC CPU 2026 scores that edge AMD's Epyc dual-socket flagship.
Chisato · · 4 min read A DPU is a specialized chip that offloads networking, storage, and security tasks from the CPU. How data processing units fit alongside CPUs and GPUs.
Chisato · · 4 min read A process node like '5nm' or '3nm' names a chipmaker's manufacturing generation, not a literal measurement anymore. Here's what the number means.
Chisato · · 5 min read RISC and CISC are two philosophies for CPU instruction sets — simple fixed-length instructions versus fewer, complex ones. How they differ and why.
Chisato · · 4 min read A system on chip packs a CPU, GPU, memory controller, and other components onto one die — the design behind phones, laptops, and most modern chips.
Chisato · · 5 min read ARM and x86 are the two dominant CPU instruction set architectures — how RISC vs CISC design differs and why it affects power and performance.
Chisato · · 4 min read An FPGA is a chip whose logic circuits can be reconfigured after manufacturing, sitting between fixed-function ASICs and general-purpose CPUs in flexibility.
Chisato · · 6 min read AI chipmaker SambaNova closed the first tranche of a $1B Series F at an $11B valuation and named JPMorgan Chase as an on-prem inference customer. The details.
Chisato · · 4 min read Moore's Law is the observation that transistor density on a chip roughly doubles every couple of years. Why it drove decades of gains, and why it's slowing.