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What Is DMA (Direct Memory Access) and Why It Matters

DMA lets peripherals move data to and from memory without the CPU copying every byte, freeing the processor to do other work during transfers.

Chisato Chisato · · 4 min read
Close-up of a computer memory module

DMA, or Direct Memory Access, is a technique that lets a peripheral device transfer data directly to or from main memory without the CPU copying every byte itself. A dedicated DMA controller handles the transfer while the processor is free to run other instructions, and the CPU is only interrupted once, when the transfer finishes, instead of once per byte or word moved.

The problem DMA solves

Without DMA, moving data from a disk or network card into memory means the CPU sits in a loop: read a byte from the device, write it to memory, repeat, thousands or millions of times for a single large transfer. This is called programmed I/O, and it’s wasteful — the CPU is a general-purpose processor capable of complex instruction execution, and it’s being used as a glorified byte-shuttling loop, unable to do anything else until the copy finishes.

For anything beyond small, infrequent transfers, this becomes a real bottleneck. A disk read of any meaningful size would otherwise pin the CPU in place for the whole duration, exactly when the system most needs the processor free to keep other work moving.

How a DMA transfer works

A DMA controller is a small, dedicated piece of hardware that can read and write memory independently of the CPU, using the same memory bus the processor itself uses. The sequence looks like this:

  1. The CPU programs the DMA controller with the source address, destination address, and the number of bytes to transfer, then hands off control.
  2. The DMA controller takes over the memory bus for the transfer, moving data directly between the device and memory without routing it through CPU registers.
  3. The CPU is free to execute other instructions during this time — it isn’t blocked waiting on the transfer.
  4. When the transfer completes, the DMA controller raises an interrupt, and the CPU handles that single interrupt to acknowledge completion and continue.

The CPU only pays attention at the start (to configure the transfer) and the end (to handle one interrupt) — not for every byte in between.

Where DMA shows up

DMA is used anywhere large or frequent transfers happen between memory and a peripheral: disk and SSD controllers moving blocks of data, network interface cards receiving packets directly into memory buffers, GPUs pulling textures and vertex data without CPU involvement, and audio hardware streaming samples in and out continuously. It’s also foundational to how GPUs and other accelerators exchange large buffers with system memory efficiently, and it’s part of why a DPU can offload networking and storage work — DMA lets it move data without looping the host CPU in on every transfer.

Cache coherence and the catch

Because DMA writes to memory directly, bypassing the CPU’s registers, it can create a subtle problem: the CPU cache might be holding a stale copy of memory that a DMA transfer just overwrote, or the CPU might read data from cache that hasn’t yet been flushed to memory before a DMA read picks it up. Systems handle this either with cache-coherent DMA, where hardware automatically keeps caches and DMA-visible memory in sync, or by requiring software to explicitly flush or invalidate the relevant cache lines around DMA operations. Getting this wrong produces bugs that are notoriously hard to reproduce, since they depend on the exact timing between a transfer and a cache access.

Modern extensions: scatter-gather and bus mastering

Early DMA controllers could only move one contiguous block of memory per transfer, which meant software had to physically arrange buffers contiguously beforehand. Scatter-gather DMA removes that constraint by letting a single DMA operation work from a list of separate memory regions, gathering scattered pages into one transfer to a device, or scattering an incoming transfer across multiple buffers, without requiring the CPU to first copy things into one contiguous block.

Modern buses also support bus mastering, where a peripheral itself — not a separate, centralized DMA controller — initiates and drives the transfer directly. This is how most contemporary PCIe devices operate: a network card or SSD becomes a bus master and moves data to and from memory on its own, coordinating with the CPU only through interrupts, over the same PCIe links that connect it to the rest of the system.

The takeaway

DMA lets peripherals transfer data to and from memory without routing every byte through the CPU, replacing a blocking copy loop with a one-time setup and a single completion interrupt. It’s essential for high-throughput I/O — disks, networking, GPUs — and modern systems extend it with scatter-gather transfers and bus-mastering peripherals that manage their own transfers directly. The tradeoff is that DMA bypasses the CPU’s caches, which is why cache coherence has to be handled explicitly, in hardware or software, wherever DMA and cached memory access meet.

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